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<title>POPF/POPFD/POPFQ—Pop Stack into EFLAGS Register </title></head>
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<h1>POPF/POPFD/POPFQ—Pop Stack into EFLAGS Register</h1>
<table>
<tr>
<th>Opcode</th>
<th>Instruction</th>
<th>Op/En</th>
<th>64-Bit Mode</th>
<th>Compat/Leg Mode</th>
<th>Description</th></tr>
<tr>
<td>9D</td>
<td>POPF</td>
<td>NP</td>
<td>Valid</td>
<td>Valid</td>
<td>Pop top of stack into lower 16 bits of EFLAGS.</td></tr>
<tr>
<td>9D</td>
<td>POPFD</td>
<td>NP</td>
<td>N.E.</td>
<td>Valid</td>
<td>Pop top of stack into EFLAGS.</td></tr>
<tr>
<td>9D</td>
<td>POPFQ</td>
<td>NP</td>
<td>Valid</td>
<td>N.E.</td>
<td>Pop top of stack and zero-extend into RFLAGS.</td></tr></table>
<h3>Instruction Operand Encoding</h3>
<table>
<tr>
<td>Op/En</td>
<td>Operand 1</td>
<td>Operand 2</td>
<td>Operand 3</td>
<td>Operand 4</td></tr>
<tr>
<td>NP</td>
<td>NA</td>
<td>NA</td>
<td>NA</td>
<td>NA</td></tr></table>
<h2>Description</h2>
<p>Pops a doubleword (POPFD) from the top of the stack (if the current operand-size attribute is 32) and stores the value in the EFLAGS register, or pops a word from the top of the stack (if the operand-size attribute is 16) and stores it in the lower 16 bits of the EFLAGS register (that is, the FLAGS register). These instructions reverse the operation of the PUSHF/PUSHFD instructions.</p>
<p>The POPF (pop flags) and POPFD (pop flags double) mnemonics reference the same opcode. The POPF instruction is intended for use when the operand-size attribute is 16; the POPFD instruction is intended for use when the operand-size attribute is 32. Some assemblers may force the operand size to 16 for POPF and to 32 for POPFD. Others may treat the mnemonics as synonyms (POPF/POPFD) and use the setting of the operand-size attribute to determine the size of values to pop from the stack.</p>
<p>The effect of POPF/POPFD on the EFLAGS register changes, depending on the mode of operation. See the Table 4-15 and key below for details.</p>
<p>When operating in protected, compatibility, or 64-bit mode at privilege level 0 (or in real-address mode, the equiv-alent to privilege level 0), all non-reserved flags in the EFLAGS register except RF<sup>1</sup>, VIP, VIF, and VM may be modi-fied. VIP, VIF and VM remain unaffected.</p>
<p>When operating in protected, compatibility, or 64-bit mode with a privilege level greater than 0, but less than or equal to IOPL, all flags can be modified except the IOPL field and RF<sup>1</sup>, IF, VIP, VIF, and VM; these remain unaffected. The AC and ID flags can only be modified if the operand-size attribute is 32. The interrupt flag (IF) is altered only when executing at a level at least as privileged as the IOPL. If a POPF/POPFD instruction is executed with insuffi-cient privilege, an exception does not occur but privileged bits do not change.</p>
<p>When operating in virtual-8086 mode (EFLAGS.VM = 1) without the virtual-8086 mode extensions (CR4.VME = 0), the POPF/POPFD instructions can be used only if IOPL = 3; otherwise, a general-protection exception (#GP) occurs. If the virtual-8086 mode extensions are enabled (CR4.VME = 1), POPF (but not POPFD) can be executed in virtual-8086 mode with IOPL &lt; 3.</p>
<p>In 64-bit mode, the mnemonic assigned is POPFQ (note that the 32-bit operand is not encodable). POPFQ pops 64 bits from the stack. Reserved bits of RFLAGS (including the upper 32 bits of RFLAGS) are not affected.</p>
<p>See Chapter 3 of the <em>Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1</em>, for more informa-tion about the EFLAGS registers.</p>
<p>1.</p>
<p>RF is always zero after the execution of POPF. This is because POPF, like all instructions, clears RF as it begins to execute.</p>
<h3>Table 4-15.  Effect of POPF/POPFD on the EFLAGS Register</h3>
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<text y="736129.142844" x="319.08" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.01942">X</text>
<text y="736129.142844" x="343.98" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.01942">X</text>
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<text y="736129.142844" x="479.58" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.01942">X</text>
<text y="736129.142844" x="498.78" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.01942">X</text>
<text y="736129.142844" x="517.98" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.01942">X</text>
<text y="736144.142844" x="200.94" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="220.56" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.187">N</text>
<text y="736144.142844" x="241.26" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.187">N</text>
<text y="736144.142844" x="261.66" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="280.56" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.187">N</text>
<text y="736144.142844" x="319.44" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="343.86" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="5.187">N</text>
<text y="736144.142844" x="369.54" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="389.34" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="408.3" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="426.42" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="444.42" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="462.0" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="480.0" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="499.2" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text>
<text y="736144.142844" x="518.4" style="font-size:7.980000pt" lengthAdjust="spacingAndGlyphs" textLength="4.23738">S</text></svg>
<p><strong>Notes</strong></p>
<p><strong>21</strong></p>
<p><strong>20</strong></p>
<p><strong>19</strong></p>
<p><strong>18</strong></p>
<p><strong>17</strong></p>
<p><strong>16</strong></p>
<p><strong>14</strong></p>
<p><strong>13:12</strong></p>
<p><strong>11</strong></p>
<p><strong>10</strong></p>
<p><strong>9</strong></p>
<p><strong>8</strong></p>
<p><strong>7</strong></p>
<p><strong>6</strong></p>
<p><strong>4</strong></p>
<p><strong>2</strong></p>
<p><strong>0</strong></p>
<p><strong>Size</strong></p>
<p><strong>ID</strong></p>
<p><strong>VIP</strong></p>
<p><strong>VIF</strong></p>
<p><strong>AC</strong></p>
<p><strong>VM</strong></p>
<p><strong>RF</strong></p>
<p><strong>NT</strong></p>
<p><strong>IOPL</strong></p>
<p><strong>OF</strong></p>
<p><strong>DF</strong></p>
<p><strong>IF</strong></p>
<p><strong>TF</strong></p>
<p><strong>SF</strong></p>
<p><strong>ZF</strong></p>
<p><strong>AF</strong></p>
<p><strong>PF</strong></p>
<p><strong>CF</strong></p>
<p><strong>Real-Address</strong></p>
<p>16</p>
<p>0</p>
<p>0-3</p>
<p>0</p>
<p><strong>Mode (CR0.PE</strong></p>
<p>32</p>
<p>0</p>
<p>0-3</p>
<p>0</p>
<p><strong>= 0)</strong></p>
<p><strong>Protected,</strong></p>
<p>16</p>
<p>0</p>
<p>0-3</p>
<p>0</p>
<p><strong>Compatibility,</strong></p>
<p>16</p>
<p>1-3</p>
<p>&lt;CPL</p>
<p>0</p>
<p><strong>and 64-Bit</strong></p>
<p><strong>Modes</strong></p>
<p>16</p>
<p>1-3</p>
<p>≥CPL</p>
<p>0</p>
<p>32, 64</p>
<p>0</p>
<p>0-3</p>
<p>0</p>
<p><strong>(CR0.PE = 1, EFLAGS.VM =</strong></p>
<p>32, 64</p>
<p>1-3</p>
<p>&lt;CPL</p>
<p>0</p>
<p><strong>0)</strong></p>
<p>32, 64</p>
<p>1-3</p>
<p>≥CPL</p>
<p>0</p>
<p>1</p>
<p><strong>Virtual-8086 (CR0.PE = 1,</strong></p>
<p>16</p>
<p>3</p>
<p>3</p>
<p>0</p>
<p><strong>EFLAGS.VM =</strong></p>
<p>1</p>
<p><strong>1,</strong></p>
<p><strong>CR4.VME = 0)</strong></p>
<p>32</p>
<p>3</p>
<p>3</p>
<p>0</p>
<p>2</p>
<p><strong>VME</strong></p>
<p>16</p>
<p>3</p>
<p>0-2</p>
<p>0/</p>
<p><strong>(CR0.PE = 1,</strong></p>
<p>X</p>
<p><strong>EFLAGS.VM =</strong></p>
<p>16</p>
<p>3</p>
<p>3</p>
<p>0</p>
<p><strong>1,</strong></p>
<p>1</p>
<p><strong>CR4.VME = 1)</strong></p>
<p>32</p>
<p>3</p>
<p>3</p>
<p>0</p>
<p><strong>NOTES:</strong></p>
<p>1. #GP fault - no flag update</p>
<p>2. #GP fault with no flag update if VIP=1 in EFLAGS register and IF=1 in FLAGS value on stack</p>
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<h2>Operation</h2>
<pre>IF VM = 0 (* Not in Virtual-8086 Mode *)
    THEN IF CPL = 0
         THEN
              IF OperandSize = 32;
                    THEN
                         EFLAGS ← Pop(); (* 32-bit pop *)
                         (* All non-reserved flags except RF, VIP, VIF, and VM can be modified; VIP, VIF, VM, and all reserved bits are unaffected. RF is cleared. *)
                    ELSE IF (Operandsize = 64)
                         RFLAGS = Pop(); (* 64-bit pop *)
                         (* All non-reserved flags except RF, VIP, VIF, and VM can be modified;
                         VIP, VIF, VM, and all reserved bits are unaffected. RF is cleared. *)
                    ELSE (* OperandSize = 16 *)
                         EFLAGS[15:0] ← Pop(); (* 16-bit pop *)
                         (* All non-reserved flags can be modified. *)
              FI;
         ELSE (* CPL &gt; 0 *)
              IF OperandSize = 32
                    THEN
                         IF CPL &gt; IOPL
                              THEN
                                    EFLAGS ← Pop(); (* 32-bit pop *)
                                    (* All non-reserved bits except IF, IOPL, VIP, VIF, VM and RF can be modified;
                                    IF, IOPL, VIP, VIF, VM and all reserved bits are unaffected; RF is cleared. *)
                              ELSE
                                    EFLAGS ← Pop(); (* 32-bit pop *)
                                    (* All non-reserved bits except IOPL, VIP, VIF, VM and RF can be modified;
                                    IOPL, VIP, VIF, VM and all reserved bits are unaffected; RF is cleared. *)
                         FI;
                    ELSE IF (Operandsize = 64)
                         IF CPL &gt; IOPL
                              THEN
                                    RFLAGS ← Pop(); (* 64-bit pop *)
                                    (* All non-reserved bits except IF, IOPL, VIP, VIF, VM and RF can be modified;
                                    IF, IOPL, VIP, VIF, VM and all reserved bits are unaffected; RF is cleared. *)
                              ELSE
                                    RFLAGS ← Pop(); (* 64-bit pop *)
                                    (* All non-reserved bits except IOPL, VIP, VIF, VM and RF can be modified;
                                    IOPL, VIP, VIF, VM and all reserved bits are unaffected; RF is cleared. *)
                         FI;
                    ELSE (* OperandSize = 16 *)
                         EFLAGS[15:0] ← Pop(); (* 16-bit pop *)
                         (* All non-reserved bits except IOPL can be modified; IOPL and all reserved bits are unaffected. *)
              FI;
         FI;
    ELSE IF CR4.VME = 1 (* In Virtual-8086 Mode with VME Enabled *)
         IF IOPL = 3
              THEN IF OperandSize = 32
                    THEN
                         EFLAGS ← Pop();
                         (* All non-reserved bits except IOPL, VIP, VIF, VM, and RF can be modified;
                         VIP, VIF, VM, IOPL and all reserved bits are unaffected. RF is cleared. *)
                    ELSE
                         EFLAGS[15:0] ← Pop(); FI;
                         (* All non-reserved bits except IOPL can be modified;
                         IOPL and all reserved bits are unaffected. *)
              FI;
         ELSE (* IOPL &lt; 3 *)
              IF (Operandsize = 32)
                    THEN
                         #GP(0);  (* Trap to virtual-8086 monitor. *)
                    ELSE (* Operandsize = 16 *)
                         tempFLAGS ← Pop();
                         IF EFLAGS.VIP = 1 AND tempFLAGS[9] = 1
                              THEN #GP(0);
                              ELSE
                                    EFLAGS.VIF ← tempFLAGS[9];
                                    EFLAGS[15:0] ← tempFLAGS;
                              (* All non-reserved bits except IOPL and IF can be modified;
                              IOPL, IF, and all reserved bits are unaffected. *)
                    FI;
              FI;
         FI;
    ELSE  (* In Virtual-8086 Mode *)
         IF IOPL = 3
              THEN IF OperandSize = 32
                    THEN
                         EFLAGS ← Pop();
                         (* All non-reserved bits except IOPL, VIP, VIF, VM, and RF can be modified;
                         VIP, VIF, VM, IOPL and all reserved bits are unaffected. RF is cleared. *)
                    ELSE
                         EFLAGS[15:0] ← Pop(); FI;
                         (* All non-reserved bits except IOPL can be modified;
                         IOPL and all reserved bits are unaffected. *)
         ELSE (* IOPL &lt; 3 *)
              #GP(0);  (* Trap to virtual-8086 monitor. *)
         FI;
    FI;
FI;</pre>
<h2>Flags Affected</h2>
<p>All flags may be affected; see the Operation section for details.</p>
<h2>Protected Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#SS(0)</td>
<td>If the top of stack is not within the stack segment.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>If a page fault occurs.</td></tr>
<tr>
<td>#AC(0)</td>
<td>If an unaligned memory reference is made while the current privilege level is 3 and alignment checking is enabled.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table>
<h2>Real-Address Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#SS</td>
<td>If the top of stack is not within the stack segment.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table>
<h2>Virtual-8086 Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#GP(0)</td>
<td>
<p>If the I/O privilege level is less than 3.</p>
<p>If an attempt is made to execute the POPF/POPFD instruction with an operand-size override prefix.</p></td></tr>
<tr>
<td>#SS(0)</td>
<td>If the top of stack is not within the stack segment.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>If a page fault occurs.</td></tr>
<tr>
<td>#AC(0)</td>
<td>If an unaligned memory reference is made while alignment checking is enabled.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table>
<h2>Compatibility Mode Exceptions</h2>
<p>Same as for protected mode exceptions.</p>
<h2>64-Bit Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#GP(0)</td>
<td>If the memory address is in a non-canonical form.</td></tr>
<tr>
<td>#SS(0)</td>
<td>If the stack address is in a non-canonical form.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>If a page fault occurs.</td></tr>
<tr>
<td>#AC(0)</td>
<td>If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table></body></html>